The Future Direction of eispice
Looking ahead some of the features I would like to add are:
-
Improved T-line models
For the next release I'm adding a W-Element-like multi-conductor, frequency-dependent model. It's based on the same Kuznetsov / Shutt-Aine paper that was used as the basis for the W-Element in HSPICE. This model will be the primary new feature in the next release. -
A Netlist Import / Manipulation Tool
Nothing but a distant flicker on the horizon, though I think it's still a useful feature and it will hopefully get added someday. -
A Digital Signaling Layer
I'm probably going to tackle this one next, so that IBIS models can drive real signals, not just a single rising or falling edge. This should be ready for release 0.12 (or maybe 1.1, I think I may go to 1.0 for the next release, the simulator core is pretty stable) -
A Graphical Schematic Entry Tool
This would be added to eide. I'm not a huge fan of schematic entry in simulators but I think it may increase the number of users, it seems like most commercial tools have some sort of schematic entry. I will always want to support the current scripting method of defining circuits as well. -
An Improved Graphing Tool
The current graphing tool is kind of weak. I assume some folks are using matplotlib. I started work on an improved graphing tool under eide in PyQt a while ago but put it on hold, I'd like to finish it someday. -
Integration of a 2D Field Solver
Once I add the W-Element it won't be of much use without a 2D field solver. MMTL is the best candidate, but I would like to integrate it into eispice with a Python API and a PyQt based GUI added onto eide (MMTL's TNT is TCL based). -
Native Semi-Conductor Models
The main purpose of eispice is for IBIS Model based pre and post routing analysis so I haven't had a need for discrete semi-conductor models but simple diodes, BJTs, FETs, etc... may be useful for others. Maybe they could be added as PyB models first, followed with faster C based models. -
Layout Import
It would be cool if there was some way to extract T-Line info from a layout (maybe from Gerber files) for automated post-routing analysis. -
An Improved Scripting Interface for Large Circuits
Eventually I would like to build on Thomas' eispice helper tools and integrate them into eispice. -
S-Parameter Model
This would be a a toughie, and kind of slow but may be well worth the effort, for simulating arbitrary devices like connectors, etc... -
Initial Conditions Support
This is something I'm hoping not to have to add, I would rather try to automatically generate initial conditions but may someday have no choice. -
Post Processing Functions
Monotonic check, undershoot, overshoot, etc... -
Clean up the Interface
Improve error messages, implement a circuit builder UI, add doc strings. -
Improve the Documentation
More examples, tutorials, and more words in the Manual would be nice. There are still a few undocumented features, and eide has absolutely no documentation. - Is there anything else you would like eispice to do? charles@thedigitalmachine.net